Saratoga, Calif., March 3, 2008 - Library Technologies, Inc. (LTI) and Plato Networks, Inc., a fabless communications semiconductor company, announced the successful use of LTI’s YieldOpt tool for analyzing the impact of process variation. Modeling process variation has emerged as a formidable challenge at small geometries with tens of global, systematic and random on chip variation sources for each device type. Traditionally, such analysis has been done using corners, where a ring oscillator is simulated using Monte Carlo techniques to find the delay distribution and associated process condition for a certain deviation from the mean value. This becomes impractical as the number of variation sources and devices affected by variation increases. An alternative is statistical library characterization using sensitivities process parameter variation. This also becomes impractical when random on chip variations need to be accounted for.
"YieldOpt has a fast direct approach to process variation which is more exhaustive than Monte Carlo analysis but at a very small fraction of the cost and time," said Mehmet Cirit, president of Library Technologies, Inc., "it can be used across all standard, custom core and IO cells to reduce pessimism and avoid optimism during timing analysis, covering variation of both passive and active devices. It handles intra-chip as well as on chip random variations and mismatches."
YieldOpt interfaces to LTI's SolutionWare characterization and modeling tools. Once enabled, best case and worst case timing and process conditions for each cell are automatically identified by YieldOpt. Alternatively, it interfaces into a traditional timing analysis flow, without the need for any special tools like statistical static timing analyzers(SSTA).
"LTI's YieldOpt saved us significant time in identifying the correct process conditions for our mixed signal designs. It also allowed the use of a more relevant test bench," said Wiren Perera, vice president, marketing and business development at Plato Networks.
About Library Technologies, Inc.
Library Technologies, Inc. is a private company, developing and marketing various integrated circuit design and analysis tools. Its products include SolutionWare which does cell, IO and memory characterization and modeling, Cellopt for cell level timing and power optimization, ChipTimer for design optimization and timing closure, PowerTeam for Verilog based dynamic gate level power simulation and finally YieldOpt for process variation analysis. More information can be found at here.
About Plato Networks
Plato Networks is applying its considerable knowledge, expertise and intellectual property in physical layer solutions to address the burgeoning need for speed within the data center. Based on its unique approach to signaling technology, Plato Networks products are more reliable over existing data center cabling, consume less power, travel further, ensure scalability and minimize silicon and board real estate through greater integration when compared with competing solutions on the market. Plato has solid institutional financing. For more information, visit www.platonetworks.com.
Contacts:
Mehmet Cirit
President
Library Technologies, Inc.
(408) 741-1214
mac@libtech.com
Wiren Perera
Vice President
Marketing and Business Development
Plato Networks, Inc.
408-988-2600-x643
wiren@platonetworks.com